What I'm doing this summer - part 1

So I'm working with FPAAs this summer. What's an FPAA? Well, it's not too inaccurate to say that they're like FPGAs except analog... But in case that doesn't mean much to you, we'll take a quick walk down the:

History of Reconfigurable Hardware
Many moons ago, somebody thought of the idea of using a read-only memory (ROM) as a simple programmable logic device (PLD). The idea here is that a memory maps an address to an output. Let's say we have n address bits. There are 2ⁿ possible logic functions using these inputs. A ROM will have an m output bits. Of the 2ⁿ possible logic functions, we can consider that our memory mapping is effectively implementing m of the logic functions. If we think about it this way, it becomes evident that a ROM will allow us to implement m logic combinations of n inputs and can be programmed to implement any logic combination of our choice. If you've heard of PROMS (Programmable), EPROMS (uv Erasable) or EEPROMS (Electrically Erasable), this is the concept behind them. They're perfectly general, but they're slow, power-hungry and even glitchy during transitions.

In the late 1970s another methodology that used programmable array logic (PAL) came forward. PALs were only programmable once, but their speed and efficiency was much improved from previous PLDs. The PAL was effectively used to replace a bunch of discrete logic elements in a circuit; you'd slap down a PAL instead of a dozen discrete TTL (transistor-transistor logic) devices. They used silicon antifuses that it would burn out to get a particular configuration. Eventually a couple of companies came up with ways to make rewritable verisons of these and called them fun acronyms like GALs (Generic) and PEELs (Programmable Electrically Eraseable Logic).

The next evolution was the CPLD. In this chip, you pretty much got a bunch of PALs connected together with some smart circuitry. The most important step in the evolution was probably that it would take serial input from a computer and have an on-board circuit parse all of that into programming for its cells. This made it possible to program thousands to tens of thousands of gates. Until recently, the big difference between CPLDs and FPGAs was that CPLDs were non-volatile, but now that many FPGAs can self-start and that almost all CPLDs are rewritable, the distinction is less clear.

Which brings us to the currently-sexy FPGA. FPGAs can have thousands to millions of gates that it can have reconfigured. These things are quite fast and very useful. I can't really speak for CPLD usage, but Wikipedia claims that they are about as useful as FPGAs and that the choice between them tends to be more about money or simply personal choice than actual technical difference.

These more complex devices are great because you get to abstract layers away. You no longer have to worry about the little gates or sometimes even the big muxes or many other things. You can simply program things like case statements and see the magic happen. I will admit that I'm occasionally less excited about these things when tried to debug them but *shrug*. They're pretty awesome.

That brings us fairly up to date on programmable logic devices and reconfigurable hardware. I'll talk about what's in a fancy new FPAA in my next post and you get to hear about some its ups and downs...